Google is tapping MediaTek as the exclusive partner for an upgraded tensor processing unit codenamed Triggerfish, marking a significant expansion of the Taiwanese chipmaker’s role in Google’s AI infrastructure strategy. The enhanced TPU v9 variant features two to three times the SRAM capacity of its base Humufish design and integrates next-generation HBM4E memory, according to supply chain analyst Ming-Chi Kuo and multiple industry sources confirmed on June 22, 2026.
The Triggerfish chip is optimized for AI agent inference and reinforcement learning workloads, two emerging priorities in the AI industry. By nearly tripling the on-chip SRAM—the processor’s fast, immediate-access memory—the design allows more active workloads to remain on-chip, reducing the need to fetch data from slower external memory pools. This architecture addresses a critical bottleneck in AI computing known as the “memory wall,” where data movement between memory levels becomes the limiting factor in performance.
Google’s TPU strategy has evolved significantly over the past year. The company now spreads development across four major partners: Broadcom, MediaTek, Marvell, and Intel, each handling specialized roles in training and inference tasks. MediaTek already contributes to Google’s TPU v8 inference models, so Triggerfish represents an escalation rather than a new relationship. The Taiwanese chipmaker is moving from a supporting player to a critical node in Google’s AI infrastructure supply chain.
Production of Triggerfish is scheduled to begin in late 2027, with volume ramping through 2028. Google projects lifetime shipments of 1 to 2 million Triggerfish units, compared to 4 to 5 million units for the standard Humufish TPU v9. The incremental order carries an approximately 30% increase in unit pricing versus the base Humufish design, a notable shift from Google’s prior TPU v8 strategy, which targeted a 20 to 30% reduction in costs.
The HBM4E memory standard underpinning Triggerfish represents the latest advance in high-bandwidth memory technology. Samsung shipped the first 12-layer HBM4E samples in May 2026, with speeds reaching 16 gigabits per second and a more than 20% improvement in bandwidth over its HBM4 predecessor, according to Reuters and industry reports.
Analyst projections suggest MediaTek will account for approximately 25% of all AI ASIC server compute shipments by 2028, a dramatic expansion from its historical role. This deal underscores Google’s broader strategy to diversify its custom silicon supply chain and reduce reliance on any single partner, particularly as demand for AI infrastructure accelerates across the industry.
Sources
- Crypto Briefing — Triggerfish chip specifications, SRAM capacity, HBM4E integration, production timeline, shipment projections, pricing premium, four-supplier strategy, and MediaTek’s 25% market share projection
- Yahoo Finance — Triggerfish memory upgrade details, HBM4E support, workload targeting, and SRAM capacity benefits
- Reuters — HBM4E speed and bandwidth specifications
